Package: iverilog # Remember to fix Source line as well: Version: 0.8 Revision: 17 Depends: readline-shlibs Provides: verilog # bison from Xcode 1.5+Nov2004 (ver. 1.2.8) works, but some versions from # Fink (1.875 and later, but not including 2.0) break the build. BuildDepends: gperf, readline, libncurses5, bison (>= 2.0) Source: ftp://ftp.icarus.com/pub/eda/verilog/v%v/verilog-%v.tar.gz Source-MD5: 12a20a7f63183e767a9d7d077eb0556c # SourceDirectory: verilog-%v Patch: %n.patch # Bug list: # # Needs testing/patch: # * math.c shift overflow DocFiles: << BUGS.txt COPYING QUICK_START.txt README.txt attributes.txt cadpli/cadpli.txt glossary.txt ieee1364-notes.txt ivl_target.txt ivlpp/ivlpp.txt lpm.txt macosx.txt netlist.txt swift.txt t-dll.txt tgt-fpga/fpga.txt tgt-vvp/README.txt:README.tgt-vvp.txt vpi.txt vvp/README.txt:README.vvp.txt vvp/functor.txt vvp/opcodes.txt vvp/vpi.txt:vpi-within-vvp.txt vvp/vthread.txt xilinx-hint.txt xnf.txt xnf2pcf.sh << # DocFiles found with: 'find . -name "*.txt"' # Additional DocFiles: COPYING # Ignored DocFiles: INSTALL cygwin.txt mingw.txt solaris/* ConfigureParams: --mandir=%p/share/man GCC: 3.3 ### For G3/G4: SetCFLAGS: -O3 -mcpu=750 -mtune=7400 SetCXXFLAGS: -O3 -mcpu=750 -mtune=7400 ### For G4 only: # SetCFLAGS: -O3 -mcpu=7400 # SetCXXFLAGS: -O3 -mcpu=7400 InstallScript: << make install prefix=%i mandir=%i/share/man install -d -m 755 %i/share/doc/%n/examples/vvp install -c -p -m 644 examples/* %i/share/doc/%n/examples install -c -p -m 644 vvp/examples/* %i/share/doc/%n/examples/vvp ranlib %i/lib/lib*.a << Description: Icarus Verilog DescDetail: << Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including XNF and EDIF netlists for synthesis, and waveform files from simulation. It strives to be true to the IEEE-1364 standard. A testbench is available at http://sourceforge.net/projects/ivtest << DescPort: << Instructions from macos.txt were followed, adapting them for the Fink way of doing things. << DescPackaging: << SetCXXFLAGS is used because CPPFLAGS does not appear to be honored (this problem manifests itself as an inability to find readline/readline.h). << License: GPL Homepage: http://www.icarus.com/eda/verilog/ Maintainer: Charles Lepple